Most of the Atari 600XL and 800XL models were supplied with the
     "debugged" version B of Atari BASIC.  This new BASIC got rid of the
     minor bugs of BASIC A and introduced some new major bugs of it's own.
     Each time a program is saved, 16 extra bytes are tagged onto the end
     of the program.  After many saves and reloads, as when developing a
     long program, the program becomes too large for the memory.
     The computer may lock up unpredictably.
     Program line links may get messed up, leaving garbage in the listing
     and the program unrunable.
     Large LISTed programs may not run unless SAVed and reLOADed.
     If the length of a listed program is a multiple of a certain number of
     bytes, it will not run unless the length is somehow changed.
     BASIC version B has been replaced by version C.  All of the XE models
     have this truly debugged version of BASIC.
     I have heard of only one bug in the operating system in XL and XE
     models.  This is a mishandling of the printer timeout.  The computer
     cannot tell if there is a printer attached or not.  This may have been
     fixed in the XE models.  However, many programs, some even formerly
     sold by Atari, do not jump through published jump vectors when using
     the operating system.  These programs will not run on XL/XE models. 
     (Some of these programs are Atari Word Processor (not Atariwriter) and
     LJKs Letter Perfect and Data Perfect.)  Since the operating system ROM
     can be switched to RAM, a "translator" can be used to load the 800
     operating system into an XL or XE model.
     The 130XE has an extra 64K bank of memory.  It is divided into four
     blocks of 16K each.  Each block can be switched to replace part of the
     main bank of RAM from $4000 (16384) to $7FFF (32767).  Furthermore, it
     can be switched in such a way that only the 6502, or the ANTIC chip
     can see the extra memory.
     Port B (formerly the two extra joystick ports of the 400/800) is used
     to manage the memory.

                         Port B  and memory management
                7 6 5 4 3 2 1 0
     PORTB     |T|U|A|C|S S|B|R|
                1 6 3 1 8 4 2 1
                2 4 2 6 
          R   1 = OS replaced by RAM
          B   0 = BASIC enabled
        S S   bank select bits
          C   0 = CPU sees switched RAM at $4000
          A   0 = ANTIC sees switched RAM
          U   unused
          T   0 = self test
     Bits 2 and 3 of PORTB select which block of the extra bank of memory
     is switched in.
                               Bank select bits
          bits      block
          2 3       address
          0 0       $0000 - $3FFF
          0 1       $4000 - $7FFF
          1 0       $8000 - $BFFF
          1 1       $C000 - $FFFF
     Bits 4 and 5 select which chip sees the switched in RAM at $4000 -
                               Chip select bits
          bits      ANTIC     6502
          4 5
          0 0       Ext.      Ext.
          0 1       Ext.      Main
          1 0       Main      Ext.
          1 1       Main      Main
             Pin out of the parallel port

                   top from rear
           1              2   GND
           3   A1         4   A0
           5   A3         6   A2
           7   A5         8   A4
           9   GND       10   A6
          11   A8        12   A7
          13   A10       14   A9
          15   A12       16   A11
          17   A14       18   A13
          19   A15       20   GND
          21   D1        22   D0
          23   D3        24   D2
          25   D5        26   D4
          27   D7        28   D6
          29   GND       30   GND
          31   GND       32   phase 2 clock
          33   RESET     34
          35   RDY       36   IRQ
          37             37
          39             40
          41   GND       42
          43   RAS       44
          45   R/W       46   GND
          47   +5V       48   +5V
          49   GND       50
     The phase 2 clock runs at 1.8 MHz.  When the clock is high, the
     address and R/W lines are valid.  The clock goes from high to low,
     when the data lines are also valid.  All lines then become invalid.
     The 130XE doesn't have the parallel port.  However, it has a cartridge
     slot expansion.  This is a small cartridge-slot-like connector with
     the necessary connector to use parallel expansion.
     If address $026E (622) is $FF, graphics 0 will be in the fine scroll
     DSCTLN [$0D25,2 (725)] is the disk sector size.  should be $80 (128).

     DMASAV [$02DD (735)] is a copy of the DMA control register, SDMCTL
     [$022F (559)].  It is set up when a channel is opened to the screen. 
     The value is moved to SDMCTL whenever a key is pressed.  It is used to
     restore the display if DMA is disabled.
     PUPBT [$033D,3 (829-831)] is used to test memory integrity when
     [RESET] is pressed.  If these bytes are not $5C, $93 and $25, the
     computer will do a cold start when [RESET] is pressed.
     The self-test ROM is from $D000 to $D7FF, the same addresses as the
     hardware registers.  This part of the operating system ROM is disabled
     when not used.  When The computer is put into the self-test mode, This
     part of ROM is copied to $5000 to $57FF and run from there.
     GINTLK [$03FA (1018)] is a logical 1 if a cartridge is installed
     (built-in BASIC is considered a cartridge).  BASIC can be disabled by
     poking 1018 with a non-zero number.  If [RESET] is then pressed, the
     computer will attempt to load the DUP.SYS file and basic will be
     completely disabled.

Craig Lisowski (